1. Field of the Invention
The present invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device which can control respective operations of a plurality of internal voltage generating circuits when the semiconductor device is in a packaged state.
2. Description of the Related Art
Generally, a semiconductor memory device includes a plurality of internal voltage generating circuits which generate internal voltages which are necessary for operation of the semiconductor memory device by using an external power voltage supplied from an external location.
In the case of a dynamic random access memory (DRAM), the semiconductor memory device includes a VPP voltage generating circuit for generating a boosted voltage VPP (e.g., voltage of greater than 2 volts and less than 3.5 volts), a VINT voltage generating circuit for generating an internal operating voltage VINT (e.g., voltage of greater than 1.5 volts and less than external power voltage), and a VBB voltage generating circuit for generating a back bias voltage VBB (e.g., voltage of greater than −0.7 volts and less than ground voltage VSS).
With the continuing trend in semiconductor memory devices in the pursuit of low power consumption, high integration and high performance, the internal voltage generating circuits arranged in semiconductor memory devices continue to increase in kind and number.
For example, conventional semiconductor memory devices have employed a VBB voltage generated from the VBB voltage generating circuit as a back bias voltage of a semiconductor substrate and a negative voltage of a word line driver; however, recent semiconductor memory devices include first and second VBB voltage generating circuits and employ a VBB1 voltage (e.g., greater than −0.7 volts and less than ground voltage VSS) generated from the first VBB voltage generating circuit as a back bias voltage of the semiconductor substrate and a VBB2 voltage (e.g., greater than −0.4 volts and less than ground voltage VSS) generated from the second VBB voltage generating circuit as the negative voltage of the word line driver.
As the kind and number of required internal voltages are increased, certain internal voltage generating circuits in the semiconductor memory device become to generate similar, or overlapping, voltage levels.
Therefore the semiconductor memory device may select one of internal voltage generating circuits that generates voltage levels required to operate in a final, manufactured state of the semiconductor memory device, considering processing parameters and designing parameters thereof.
However, the conventional semiconductor memory device does not have a means for selecting the suitable internal voltage generating circuit among certain internal voltage generating circuits and to replace certain internal voltage generating circuits as the selected internal voltage generating circuit in a final, manufactured state of the semiconductor memory device.
As a result, when one of certain internal voltage generating circuits is needed in a state where the semiconductor chip is completely manufactured, the product manufacturer is required to reflect this in the product design and to re-manufacture the semiconductor chip. Accordingly, there is a problem in that cost and time to manufacture the semiconductor memory device are increased as a result.